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TMCNet:  U.S. Patents Awarded to Inventors in New York (Jan. 4)

[January 04, 2013]

U.S. Patents Awarded to Inventors in New York (Jan. 4)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Jan. 4 -- The following federal patents were awarded to inventors in New York.

*** International Business Machines Assigned Patent for Three-dimensional Silicon Interposer for Low Voltage Low Power Systems ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,512) developed by John U. Knickerbocker, Yorktown Heights, N.Y., for a "three-dimensional silicon interposer for low voltage low power systems." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Scalable silicon (Si) interposer configurations that support low voltage, low power operations are provided. In one aspect, a Si interposer is provided which includes a plurality of through-silicon vias (TSVs) within a first plane thereof adapted to serve as power, ground and signal interconnections throughout the first plane such that the TSVs that serve as the power and ground interconnections are greater in number and/or size than the TSVs that serve as the signal interconnections; and a plurality of lines within a second plane of the interposer in contact with one or more of the TSVs in the first plane, the second plane being adjacent to the first plane, adapted to serve as power, ground and signal interconnections throughout the second plane such that the lines that serve as the power and the ground interconnections are greater in number and/or size than the lines that serve as the signal interconnections." The patent application was filed on Aug. 20, 2009 (12/544,987). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,512&OS=8,344,512&RS=8,344,512 Written by Arpi Sharma; edited by Anand Kumar.



*** tau-Metrix Assigned Patent ALEXANDRIA, Va., Jan. 4 -- tau-Metrix, Fremont, Calif., has been assigned a patent (8,344,745) developed by five co-inventors for a "test structures for evaluating a fabrication of a die or a wafer." The co-inventors are Majid Aghababazadeh, San Jose, Calif., Jose J. Estabil, Weston, Conn., Nader Pakdaman, Monte Sereno, Calif., Gary L. Steinbrueck, Wappingers, N.Y., and James S. Vickers, San Jose, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of test structures located on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter at the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed." The patent application was filed on Aug. 31, 2006 (11/469,305). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,745&OS=8,344,745&RS=8,344,745 Written by Arpi Sharma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Integrated Chip Carrier with Compliant Interconnects ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,516) developed by Timothy J. Chainer, Putnam Valley, N.Y., for an "integrated chip carrier with compliant interconnects." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A silicon chip includes a silicon substrate, a plurality of pads, and a plurality of through vias to connect back-end-of-line wiring to the plurality of pads. The silicon substrate includes a layer of active devices and the back-end-of-line wiring connected to the active devices." The patent application was filed on Jan. 7, 2011 (12/986,460). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,516&OS=8,344,516&RS=8,344,516 Written by Arpi Sharma; edited by Anand Kumar.

*** Intersil Americas Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Intersil Americas, Milpitas, Calif., has been assigned a patent (8,344,777) developed by Weihong Qiu, San Jose, Calif., Chun Cheung, Brooklyn, N.Y., and Emil Chen, Mountain View, Calif., for a "method and apparatus for adaptively modifying a pulse width of a pulse width modulated output." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems, methods, and apparatus for improving steady state operation of a pulse width modulator during transient and soft start events are described herein. An apparatus can include a phase component configured to adaptively modify a pulse width of a first pulse width modulated (PWM) output signal based on a pulse width of a PWM input signal. Further, the apparatus can include a power stage component configured to source at least one of a voltage or a current to a load based on the first PWM output signal. In one example, the phase component can be configured to linearly extend the pulse width of the first PWM output signal based on the pulse width of the PWM input signal. In another example, the phase component can be configured to adaptively modify the pulse width of the first PWM output signal based on a predetermined maximum pulse width." The patent application was filed on Aug. 17, 2010 (12/858,181). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,777&OS=8,344,777&RS=8,344,777 Written by Arpi Sharma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Non Volatile Cell and Architecture with Single Bit Random Access Read, Program and Erase ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,475) developed by Chung H. Lam, Peekskill, N.Y., Mark C.H. Lamorey, South Burlington, Vt., and Thomas M. Maffitt, Burlington, Vt., for a "non volatile cell and architecture with single bit random access read, program and erase." The abstract of the patent published by the U.S. Patent and Trademark Office states: "One embodiment is a non-volatile memory cell with random access read, program, and erase. The memory cell includes a cell transistor that includes a source region, a drain region, a first insulating spacer, and a second insulating spacer. The memory cell also includes a source-side transistor, a drain-side transistor, a source-side multiplexer, a drain-side multiplexer, a source-side sense amplifier, and a drain-side write driver. A first binary value is stored in a first bit in the memory cell by trapping or releasing a first electric charge in the first insulating spacer. The first bit is read by sensing the resistive change in the cell transistor or by sensing the threshold voltage change in the cell transistor." The patent application was filed on Nov. 17, 2009 (12/619,771). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,475&OS=8,345,475&RS=8,345,475 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Futurewei Technologies Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Futurewei Technologies, Plano, Texas, has been assigned a patent (8,345,542) developed by Robert Sultan, Somers, N.Y., and T. Benjamin Mack-Crane, Downers Grove, Ill., for a "method of M:1 protection." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus comprising a first segment endpoint bridge (SEB) configured to couple to a second SEB via a plurality of path segments, wherein the path segments comprise a working segment and a plurality of candidate protection segments, wherein the candidate protection segments comprise a protection segment that is configured to protect the working segment, wherein the candidate protection segments other than the protection segment do not protect the working segment, wherein only one first state variable is used to maintain each of the candidate protection segments other than the protection segment, and wherein a plurality of second state variables are used to maintain each of the working segment and the protection segment." The patent application was filed on Aug. 23, 2010 (12/861,415). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,542&OS=8,345,542&RS=8,345,542 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Automatically Calibrating Regions of Interest for Video Surveillance ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,101) developed by seven co-inventors for "automatically calibrating regions of interest for video surveillance." The co-inventors are Russell Patrick Bobbitt, Pleasantville, N.Y., Quanfu Fan, Somerville, Mass., Arun Hampapur, Norwalk, Conn., Frederik Kjeldsen, Poughkeepsie, N.Y., Sharathchandra Umapathirao Pankanti, Darien, Conn., Akira Yanagawa, New York, and Yun Zhai, White Plains, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques for automatically calibrating one or more regions of interest for video surveillance are provided. The techniques include at a user-defined frequency, determining if one or more regions of interest (ROIs) are present within a field of view of a camera, if one or more ROIs are present within the field of view of the camera, automatically calibrating the one or more ROIs within the field of view of the camera, and if one or more ROIs are not present within the field of view of the camera, sending an alert to a user." The patent application was filed on Oct. 31, 2008 (12/262,446). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,101&OS=8,345,101&RS=8,345,101 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Parellel Consulting Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Parellel Consulting, Dover, Del., has been assigned a patent (8,345,087) developed by Oliver S. Cossairt, New York, for an "image enhancement for three-dimensional displays." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A three-dimensional (3D) display apparatus includes an image generation subsystem (IGS) for generating at least one two-dimensional (2D) image and providing filtered rays derived from the at least one 2D image to an optical element for modulating the filtered rays and producing a 3D image, wherein the filtered rays comprise limited overlap of pixel information. A method and a computer program product for generating 3D images are provided." The patent application was filed on Feb. 27, 2007 (11/679,539). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,087&OS=8,345,087&RS=8,345,087 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Interleaved, Immersion-cooling Apparatuses and Methods for Cooling Electronic Subsystems ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,423) developed by five co-inventors for "interleaved, immersion-cooling apparatuses and methods for cooling electronic subsystems." The co-inventors are Levi A. Campbell, Poughkeepsie, N.Y., Richard C. Chu, Hopewell Junction, N.Y., Michael J. Ellsworth Jr., Lagrangeville, N.Y., Madhusudan K. Iyengar, Woodstock, N.Y., and Robert E. Simons, Poughkeepsie, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Cooling apparatuses and methods are provided for immersion-cooling of an electronic subsystem of an electronics rack. The cooling apparatuses include a housing at least partially surrounding and forming a sealed compartment about the electronic subsystem and a dielectric fluid disposed within the sealed compartment, with the electronic subsystem being immersed within the dielectric fluid. A liquid-cooled vapor condenser is provided which includes a plurality of thermally conductive condenser fins extending within the sealed compartment. The condenser fins facilitate cooling and condensing of dielectric fluid vapor generated within the sealed compartment. Within the sealed compartment, multiple thermally conductive condenser fins are interleaved with multiple fluid-boiling fins of a heat spreader coupled to one or more of the electronic components immersed within the dielectric fluid. The interleaved fins facilitate localized cooling and condensing of dielectric fluid vapor within the sealed compartment." The patent application was filed on June 29, 2010 (12/825,776). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,423&OS=8,345,423&RS=8,345,423 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Internal Bypassing of Memory Array Devices ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,497) developed by four co-inventors for "internal bypassing of memory array devices." The co-inventors are Paul A. Bunce, Poughkeepsie, N.Y., John D. Davis, Maybrook, N.Y., Diana M. Henderson, Poughkeepsie, N.Y., and Jigar J. Vora, Westborough, Mass.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An output control circuit for a memory array includes a latched output node precharged to a first logic state prior to both a read and write operation; first logic that couples memory cell data from a memory read path to the output node during the read operation, the first logic controlled by a timing signal; second logic that internally bypasses the memory read path during a write operation by decoupling it from the output node, such that a logical derivative of write data written to the memory array is also coupled to the output node, the second logic also controlled by the timing signal; and wherein a transition of the output node from the first logic state to a second logic state during the write operation occurs within a time range as that of the same transition during the read operation." The patent application was filed on June 23, 2010 (12/822,058). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,497&OS=8,345,497&RS=8,345,497 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Exelis Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Exelis, McLean, Va., has been assigned a patent (8,345,250) developed by Mark Steven Janosky, Rochester, N.Y., and Joseph Lawrence Lippert, Rochester, N.Y., for a "system and method for detecting chemical species from a remote sensing platform." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A remote sensing system includes a transmitter for transmitting an online signal and first and second offline signals toward a target. A receiver receives a returned online signal and first and second returned offline signals from the target. A processor is provided for determining (a) a first ratio based on the returned online signal and first offline signal, and (b) a second ratio based on the returned online signal and second offline signal. A filter is also provided for correlating the first ratio with the second ratio for determining whether the returned online, first offline and/or second offline signals are useable. The returned online, first offline and second offline signals are used to compute first and second concentration path lengths (CPLs) of a column of air between a target and the remote sensing platform." The patent application was filed on Nov. 2, 2009 (12/610,443). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,250&OS=8,345,250&RS=8,345,250 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** General Electric Assigned Patent ALEXANDRIA, Va., Jan. 4 -- General Electric, Schenectady, N.Y., has been assigned a patent (8,345,526) developed by six co-inventors for "non-binary holograms for increased capacity." The co-inventors are John Erik Hershey, Ballston Lake, N.Y., Kenneth Brakeley Welles, Scotia, N.Y., John Anderson Fergus Ross, Niskayuna, N.Y., Xiaolei Shi, Niskayuna, N.Y., Zhiyuan Ren, Malta, N.Y., and Victor Petrovich Ostroverkhov, Ballston Lake, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques are provided for increasing storage capacity in a holographic storage system. While typical holographic storage systems involve binary storage for each data position in a holographic disk, present techniques involve storing data such that more than two data levels may be recorded in each data position. In some embodiments, a recording beam directed to the disk may be adjusted to different power levels depending on the data level to be recorded. Furthermore, the recording time at a data position may be adjusted to increase the energy directed to the data position by increasing the amount of time the recording beam is impinged on the data position. Embodiments are suitable for different types of holographic storage, including dye-based medium." The patent application was filed on Dec. 29, 2010 (12/981,279). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,526&OS=8,345,526&RS=8,345,526 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** General Electric Assigned Patent for Mastering and Replication of Micro-holographic Data Storage Media ALEXANDRIA, Va., Jan. 4 -- General Electric, Schenectady, N.Y., has been assigned a patent (8,345,334) developed by seven co-inventors for a "mastering and replication of micro-holographic data storage media." The co-inventors are Xiaolei Shi, Niskayuna, N.Y., Kenneth Brakeley Welles, Scotia, N.Y., John Erik Hershey, Ballston Lake, N.Y., John Anderson Fergus Ross, Niskayuna, N.Y., Brian Lee Lawrence, Niskayuna, N.Y., Zhiyuan Ren, Malta, N.Y., and Victor Petrovich Ostroverkhov, Ballston Lake, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for replicating optical data storage discs (e.g., holographic data storage discs) having multiple layers of data. Master discs providing for respective single layers of data are utilized, and each respective single layer of data from the master discs are replicate onto the optical data storage disc." The patent application was filed on Dec. 31, 2005 (12/347,211). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,334&OS=8,345,334&RS=8,345,334 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Harris Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Harris, Melbourne, Fla., has been assigned a patent (8,345,097) developed by four co-inventors for a "hybrid remote digital recording and acquisition system." The co-inventors are Jeffrey Zampieron, Rochester, N.Y., Joseph Presicci, Rochester, N.Y., Mark Sanders, Rochester, N.Y., and Robert Post, Victor, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A surveillance system includes an event module that receives an event detection signal that indicates an event external to the surveillance system. The system also includes a power control module that selectively operates a data recording device at least partially concurrent with the event based on the event detection signal. The system also includes a selection module that selects a portion of data recorded by the data recording device based on content of the data. A data transmission module transmits the portion over a remote communication link." The patent application was filed on Feb. 15, 2008 (12/070,386). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,097&OS=8,345,097&RS=8,345,097 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Xerox Assigned Patent for Methods and Systems to Embed Glossmark Digital Watermarks into Continuous-tone Images ALEXANDRIA, Va., Jan. 4 -- Xerox, Norwalk, Conn., has been assigned a patent (8,345,314) developed by Shen-Ge Wang, Fairport, N.Y., Reiner Eschbach, Webster, N.Y., and William A. Fuss, Rochester, N.Y., for "methods and systems to embed glossmark digital watermarks into continuous-tone images." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Disclosed are methods/systems to embed a watermark into a contone image. Specifically, the disclosed methods and systems spatially modulate a contone image substantially adjacent a watermark area according to a first polarization and spatially modulate the contone image substantially within the watermark area according to a second polarization. These spatially modulated images may then be subsequently processed, stored, communicated and/or rendered." The patent application was filed on Nov. 24, 2008 (12/276,851). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,314&OS=8,345,314&RS=8,345,314 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Xerox Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Xerox, Norwalk, Conn., has been assigned a patent (8,345,329) developed by David Lieberman, Fairport, N.Y., for "systems and methods for improving image quality in image forming devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An image forming device may select from among a plurality of rendering parameters to include selectable halftone frequency candidates automatically based on an internal determination regarding an operating condition of the device to improve image quality for formed images. As a time varying function of the status and/or condition of the components and/or consumables employed in the image forming device, a capability is provided for the device to independently determine an optimal individual or set of rendering parameters to be employed based on a monitored device status. Available monitoring data for a current overall condition of the image forming device, to include monitoring a condition of the components and/or the consumables within the device, is used to allow the device to internally perform automatic adjustment of one or more image rendering parameters, including automatically implementing an optimal halftone frequency election scheme." The patent application was filed on Sept. 21, 2007 (11/858,996). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,329&OS=8,345,329&RS=8,345,329 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** General Electric Assigned Patent for Large Area Modular Sensor Array Assembly and Method for Making the Same ALEXANDRIA, Va., Jan. 4 -- General Electric, Niskayuna, N.Y., has been assigned a patent (8,345,508) developed by five co-inventors for a "large area modular sensor array assembly and method for making the same." The co-inventors are Robert Gideon Wodnicki, Niskayuna, N.Y., Rayette Ann Fisher, Niskayuna, N.Y., Charles Gerard Woychik, Niskayuna, N.Y., Shubhra Bansal, Niskayuna, N.Y., and Albert Taesung Byun, Guilderland, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A modular and tileable sensor array with routing in the interposer carrying the signals from the sensors to the integrated circuits. In one embodiment a large area modular sensor array assembly includes one or more tileable modules coupled together. The tileable modules have a plurality of transducer cells forming a sensor, an interposer coupled on a first side to the plurality of transducer cells by a plurality, one or more integrated circuits coupled to a second side of the interposer, wherein the interposer is configured to form the connection of at least some of the transducer cells to the integrated circuits, and one or more input/output connectors coupled to the interposer and providing an external interface." The patent application was filed on Feb. 26, 2010 (12/714,239). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,508&OS=8,345,508&RS=8,345,508 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Eastman Kodak Assigned Patent for Denoising CFA Images Using Weighted Pixel Differences ALEXANDRIA, Va., Jan. 4 -- Eastman Kodak, Rochester, N.Y., has been assigned a patent (8,345,130) developed by James E. Adams Jr., Rochester, N.Y., Mrityunjay Kumar, Rochester, N.Y., and Efrain O. Morales, Rochester, N.Y., for "denoising CFA images using weighted pixel differences." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for reducing noise in an image captured using a digital image sensor having pixels being arranged in a rectangular minimal repeating unit, comprising: computing first weighted pixel differences by combining first pixel differences between the pixel value of a central pixel and pixel values for nearby pixels of the first channel in a plurality of directions with corresponding local edge-responsive weighting values; computing second weighted pixel differences by combining second pixel differences between pixel values for pixels of at least one different channel in the plurality of directions with corresponding local edge-responsive weighting values; and computing a noise-reduced pixel value for the central pixel by combining the first and second weighted pixel differences with the pixel value for the central pixel." The patent application was filed on Jan. 29, 2010 (12/696,081). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,130&OS=8,345,130&RS=8,345,130 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Split Voltage Level Restore and Evaluate Clock Signals for Memory Address Decoding ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,490) developed by four co-inventors for a "split voltage level restore and evaluate clock signals for memory address decoding." The co-inventors are Paul A. Bunce, Poughkeepsie, N.Y., John D. Davis, Maybrook, N.Y., Diana M. Henderson, Poughkeepsie, N.Y., and Jigar J. Vora, Westborough, Mass.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of implementing voltage level shifting for a memory device includes coupling one or more evaluation clock signals to a memory address decode circuit, the one or more evaluation clock signals operating at a first voltage supply level; and coupling a restore clock signal to the memory address decode circuit, the restore clock signal operating at a second voltage supply level that is higher than the first voltage supply level; wherein one or more outputs of the memory address decode circuit operate at the second voltage supply level." The patent application was filed on June 23, 2010 (12/821,824). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,490&OS=8,345,490&RS=8,345,490 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,428) developed by four co-inventors for a "nanopillar E-fuse structure and process." The co-inventors are Satya N. Chakravarti, Hopewell Junction, N.Y., Dechao Guo, Hopewell Junction, N.Y., Huiming Bu, Albany, N.Y., and Keith Kwong Hon Wong, Hopewell Junction, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques for incorporating nanotechnology into electronic fuse (e-fuse) designs are provided. In one aspect, an e-fuse structure is provided. The e-fuse structure includes a first electrode; a dielectric layer on the first electrode having a plurality of nanochannels therein; an array of metal silicide nanopillars that fill the nanochannels in the dielectric layer, each nanopillar in the array serving as an e-fuse element; and a second electrode in contact with the array of metal silicide nanopillars opposite the first electrode. Methods for fabricating the e-fuse structure are also provided as are semiconductor devices incorporating the e-fuse structure." The patent application was filed on Nov. 30, 2009 (12/627,747). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,428.PN.&OS=PN/83,44,428&RS=PN/83,44,428 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Graphene Transistor with a Self-aligned Gate ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,358) developed by four co-inventors for a "graphene transistor with a self-aligned gate." The co-inventors are Phaedon Avouris, Yorktown Heights, N.Y., Damon B. Farmer, White Plains, N.Y., Yu-Ming Lin, West Harrison, N.Y., and Yu Zhu, West Harrison, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A graphene-based field effect transistor includes source and drain electrodes that are self-aligned to a gate electrode. A stack of a seed layer and a dielectric metal oxide layer is deposited over a patterned graphene layer. A conductive material stack of a first metal portion and a second metal portion is formed above the dielectric metal oxide layer. The first metal portion is laterally etched employing the second metal portion, and exposed portions of the dielectric metal oxide layer are removed to form a gate structure in which the second metal portion overhangs the first metal portion. The seed layer is removed and the overhang is employed to shadow proximal regions around the gate structure during a directional deposition process to form source and drain electrodes that are self-aligned and minimally laterally spaced from edges of the gate electrode." The patent application was filed on Sept. 7, 2010 (12/876,454). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,358.PN.&OS=PN/83,44,358&RS=PN/83,44,358 Written by Amal Ahmed; edited by Jaya Anand.

*** Eastman Kodak Assigned Patent for Duplex Thermal Dye Receiver Elements and Imaging Methods ALEXANDRIA, Va., Jan. 4 -- Eastman Kodak, Rochester, N.Y., has been assigned a patent (8,345,075) developed by Narasimharao Dontula, Rochester, N.Y., Richard S. Paoletti, Spencerport, N.Y., and Steven J. Tomanovich, Rush, N.Y., for "duplex thermal dye receiver elements and imaging methods." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A duplex thermal dye transfer element has a substrate, a non-voided compliant layer and a thermal dye image receiving layer. These imaging elements can be imaged on either or both sides in combination with one or more thermal dye donor elements in a thermal dye transfer process. Imaging can form a dye image or transfer clear films or laminates or metalized layers to either or both sides of the substrate." The patent application was filed on April 27, 2011 (13/094,935). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,075&OS=8,345,075&RS=8,345,075 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Eastman Kodak Assigned Patent for Context Coordination for an Artistic Digital Template for Image Display ALEXANDRIA, Va., Jan. 4 -- Eastman Kodak, Rochester, N.Y., has been assigned a patent (8,345,057) developed by Raymond W. Ptucha, Honeoye Falls, N.Y., Laura R. Whitby, Rochester, N.Y., and William Bogart, Williamson, N.Y., for a "context coordination for an artistic digital template for image display." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus and method for creating a coordinated image display. A computer system comprising stored digital templates for said image display can be operated by a user to generate the image display. The templates each have a plurality of digital openings for displaying digital images and each of those openings has a required image attribute. The group of required attributes for the openings are stored as a template recipe. The template recipe includes a required image attribute for a dependent opening. The dependent opening is dependent on an image attribute of an image captured by a capture device coupled to the computer system, which includes scanners and cameras. The captured image can be of a paint swatch, a fabric, furniture, carpeting, or any other item or image." The patent application was filed on July 30, 2009 (12/512,129). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,057&OS=8,345,057&RS=8,345,057 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** General Electric Assigned Patent ALEXANDRIA, Va., Jan. 4 -- General Electric, Niskayuna, N.Y., has been assigned a patent (8,344,389) developed by Donald Seton Farquhar, Niskayuna, N.Y., and Michael Scott Herzog, Voorheesville, N.Y., for an optoelectronic device array.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An optoelectonice device array includes a plurality of packages, each enclosing an optoelectronic device, and positioned in at least one row. Each package overlaps at least one adjacent package, and may be hermetically sealed." The patent application was filed on Jan. 29, 2010 (12/696,510). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,389.PN.&OS=PN/83,44,389&RS=PN/83,44,389 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Enhanced Quality of Laser Ablation by Controlling Laser Repetition Rate ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,286) developed by Peter P. Longo, Hopewell Junction, N.Y., and Alfred Wagner, Brewster, N.Y., for an "enhanced quality of laser ablation by controlling laser repetition rate." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of enhancing the quality of laser ablation by controlling the laser repetition rate during the ablation process, wherein the method enhances the quality of laser ablation of a photomask in order to improve the optical quality thereof. Also provided is a system employing the method of enhancing the quality of laser ablation." The patent application was filed on Jan. 18, 2007 (11/624,235). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,286.PN.&OS=PN/83,44,286&RS=PN/83,44,286 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Phase Change Memory Device with Plated Phase Change Material ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,344,351) developed by four co-inventors for a "phase change memory device with plated phase change material." The co-inventors are Matthew J. Breitwisch, Yorktown Heights, N.Y., Eric A. Joseph, White Plains, N.Y., Alejandro G. Schrott, New York, and Xiaoyan Shao, Yorktown Heights, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A phase change memory device includes a plurality of memory cells comprising a substrate having a contact surface with an array of conductive contacts to be connected with access circuitry and a nitride layer formed at the contact surface. A plurality of vias are formed through the nitride layer to the contact surface and correspond to each conductive contact, the vias including a conformal conductive seed layer lining each via along exposed portions of the nitride layer and the contact surface and having oxidized edges. A dielectric layer is recessed within the conformal conductive seed layer and exposes a center region of each via. A phase change material is recessed within the center region of each via. A conductive material that remains conductive upon oxidation is formed over the phase change material. A top electrode is formed on each memory cell." The patent application was filed on June 14, 2011 (13/159,594). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,351.PN.&OS=PN/83,44,351&RS=PN/83,44,351 Written by Amal Ahmed; edited by Jaya Anand.

*** ExxonMobil Chemical Patents Assigned Patent for Production of Para-xylene by the Methylation of Benzene and/or Toluene ALEXANDRIA, Va., Jan. 4 -- ExxonMobil Chemical Patents, Houston, has been assigned a patent (8,344,197) developed by six co-inventors for a "production of para-xylene by the methylation of benzene and/or toluene." The co-inventors are James R. Lattner, La Porte, Texas, Mark P. Hagemeister, Houston, Jon Edmond Randolph Stanat, Westhampton Beach, N.Y., John Di-Yi Ou, Houston, Xiaobo Zheng, Houston, and Lu Han, Herndon, Va.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a process for the production of para-xylene, methanol is preheated to a first temperature, an aromatic feedstock comprising toluene and/or benzene is preheated to a second temperature and the preheated methanol and aromatic feedstocks are fed to a reactor at a first methanol to aromatic feedstock molar ratio. The preheated aromatic feedstock is contacted with the preheated methanol under alkylation conditions in the reactor in the presence of a catalyst so that the methanol reacts with the aromatic feedstock to produce an effluent comprising para-xylene. During the reaction, a temperature is measured within the reactor and is compared with a predetermined optimal temperature. The methanol to aromatic feedstock molar ratio is then adjusted in a manner to reduce any difference between the measured and predetermined optimal temperatures in the reactor." The patent application was filed on Sept. 30, 2010 (12/894,778). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,44,197.PN.&OS=PN/83,44,197&RS=PN/83,44,197 Written by Amal Ahmed; edited by Jaya Anand.

*** Altman Stage Lighting Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Altman Stage Lighting, Yonkers, N.Y., has been assigned a patent (8,344,655) developed by five co-inventors for a "power and data track lighting system." The co-inventors are John F. Luk, Flushing, N.Y., Dean J. Reiter, Stony Point, N.Y., John T. Ryan, Riverdale, N.Y., Michael J. Tucker, Parsippany, N.J., and Gary R. Leonard, Wappunger Falls, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A combined power and data track lighting system includes an elongated track, having a number of longitudinal guide ways for carrying electrically isolated power and data conductors arranged within at least some or the guide ways. An adapter applies power to the power conductors, and another adapter applies control data to the data conductors. An LED luminaire contains LEDs, each of which can generate a discrete color. A data converter converts data on the data lines to control the currents in the individual LEDs to create a desired composite color. Quartz luminaire, Metal-Halide luminaire, Digital Light Processor (DLP) automated computer luminaire, and DMX controlled devices can be supported and controlled through the track, that can be supported on trusses. The main control data is Remote Device Management (RDM) supplied applied to the data conductors." The patent application was filed on Jan. 25, 2010 (12/692,728). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,655&OS=8,344,655&RS=8,344,655 Written by Arpi Sharma; edited by Anand Kumar.

*** Bayer HealthCare Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Bayer HealthCare, Tarrytown, N.Y., has been assigned a patent (8,343,332) developed by Daniel V. Brown, Chappaqua, N.Y., for an electrochemical test sensor.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An electrochemical test sensor for detecting the concentration of an analyte in a sample. The electrochemical test sensor comprises a base that provides a flow path for the fluid test sample having a counter electrode and a working electrode on its surface in electrical communication with a detector of electrical current. The electrochemical test sensor further includes a reagent layer directly located on the surface of the working electrode. The reagent layer includes an enzyme that is adapted to react with the analyte. The electrochemical test sensor further comprises a lid adapted to mate with the base and to assist in forming a capillary space with an opening for the introduction of the sample thereto. The capillary space is formed with a three-dimensional portion of the lid." The patent application was filed on June 16, 2011 (13/161,953). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,343,332&OS=8,343,332&RS=8,343,332 Written by Arpi Sharma; edited by Anand Kumar.

*** General Electric Assigned Patent for Seal Leakage and Seal Oil Contamination Detection in Generator ALEXANDRIA, Va., Jan. 4 -- General Electric, Schenectady, N.Y., has been assigned a patent (8,344,676) developed by eight co-inventors for a "seal leakage and seal oil contamination detection in generator." The co-inventors are Vinodh Kumar Bandaru, Bangalore, India, Jeffrey James Andritz, Altamont, N.Y., James Daniel Antalek, Valatie, N.Y., Krishna Swamy Cherukuri, Bangalore, India, Daniel James Fitzmorris, Clifton Park, N.Y., Anthony James George, Clifton Park, N.Y., Nicola Piccirillo, Scotia, N.Y., and Sudhanshu Rai, Ghazipur, India.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Detection of, among other things, seal leakage(s) and/or seal oil contamination for a gas cooled generator are provided. Detectors according to some embodiments of the invention provide mechanisms of early detection of cooling gas, e.g., hydrogen, leakage through leakage sources as well as low purity and high cooling gas consumption problems in a gas cooled generator." The patent application was filed on June 17, 2010 (12/817,260). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,676&OS=8,344,676&RS=8,344,676 Written by Arpi Sharma; edited by Anand Kumar.

*** General Electric Assigned Patent for Power Conversion Control with Energy Storage ALEXANDRIA, Va., Jan. 4 -- General Electric, Niskayuna, N.Y., has been assigned a patent (8,344,550) developed by Robert William Delmerico, Clifton Park, N.Y., and Xiaoming Yuan, Hubei, China, for a "power conversion control with energy storage." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A power generation system includes a renewable power source for producing source power; a source side converter for converting the source power to converted DC power; a source side controller for driving the converted DC power towards a maximum power point; a DC link for receiving the converted DC power; a grid side converter coupled to the DC link for converting DC link power from the DC link to AC output power for a grid; a grid side controller for controlling the AC output power of the grid side converter to achieve grid interconnection requirements; an electrical energy storage device; an energy storage converter coupling the energy storage device to the DC link; an energy storage controller for controlling the energy storage converter to achieve a desired power balance on the DC link." The patent application was filed on Dec. 21, 2010 (12/974,104). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,550&OS=8,344,550&RS=8,344,550 Written by Arpi Sharma; edited by Anand Kumar.

*** New York Air Brake Assigned Patent ALEXANDRIA, Va., Jan. 4 -- New York Air Brake, Watertown, N.Y., has been assigned a patent (8,346,413) developed by seven co-inventors for a "wireless display unit for ECP transition system." The co-inventors are Patrick Storms, Carthage, N.Y., Richard Matusiak, Watertown, N.Y., John LaDuc, Harrisville, N.Y., Bryan McLaughlin, Watertown, N.Y., Gary S. Newton, Adams, N.Y., Dale R. Stevens, Adams Center, N.Y., and Jon M. Marra, Henderson, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present interface system includes a controller monitoring pressure on a locomotive brake pipe port, controlling pressure on a train brake pipe port in response to the pressure on a locomotive brake pipe port, providing ECP commands on an ECP trainline via a train electrical terminal in response to the pressure on the locomotive brake pipe port, and providing electrical power on the ECP trainline via an train electrical trainline terminal from the locomotive electrical trainline terminal. A transceiver is connected to the controller for wireless communication with the controller. A wireless display unit communicates via the transceiver with the controller and displays information from the controller to the operator remote from the interface system and provides inputs from the operator to the controller. The system also includes a three position change over valve. An event recorder and a GPS system may be connected to the controller." The patent application was filed on Sept. 8, 2008 (12/673,606). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,346,413.PN.&OS=PN/8,346,413&RS=PN/8,346,413 Written by Kusum Sangma; edited by Anand Kumar.

*** Greatbatch Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Greatbatch, Clarence, N.Y., has been assigned a patent (8,346,362) developed by James Kinney, Clarence, N.Y., James Coffed, Depew, N.Y., and Gabriel A. Kustra, Cheektowaga, N.Y., for a "molded header connected to a medical device by lateral deformation of a sleeve/feedthrough pin sub-assembly." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A header assembly for connecting an implantable medical device to at least one conductor lead terminating within a patient intended to be assisted by the medical device is provided. The implantable medical device is comprised of numerous feedthrough wires in a dense, non-linear, scattered format extending from the control circuitry and through a wall of the housing. The header assembly is comprised of an insulative body that is mountable on the housing of the medical device. The insulative body supports at least one conductor subassembly comprising a terminal that is directly connectable to the conductor lead, an intermediate conductor wire comprising a distal end connected to the terminal and a proximal end connected to a connector sleeve. Methods for making the header assembly and for connecting the header assembly to the implantable medical device are also disclosed." The patent application was filed on June 1, 2009 (12/475,643). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,346,362.PN.&OS=PN/8,346,362&RS=PN/8,346,362 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machine Assigned Patent for Method and Apparatus for Predicting Avatar Movement in a Virtual Universe ALEXANDRIA, Va., Jan. 4 -- International Business Machine, Armonk, N.Y., has been assigned a patent (8,345,049) developed by four co-inventors for a "method and apparatus for predicting avatar movement in a virtual universe." The co-inventors are Rick Allen Hamilton II, Charlottesville, Va., Brian Marshall O'Connell, Cary, N.C., Clifford Alan Pickover, Yorktown Heights, N.Y., and Keith Raymond Walker, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention provides a computer implemented method, apparatus, and computer useable program code to offer to move an avatar in a virtual universe. A computer predicts a location selection to form a prediction. The computer renders a first viewport in a computer display, based on the prediction. The first viewport includes a first user-control; a first coordinate; and a first attitude. The computer renders a second viewport comprising a second user-control, a second coordinate and a second attitude wherein at least one object is rendered in a computer display from a perspective distinct from a perspective of the first viewport. The computer receives an instruction corresponding to the first user-control." The patent application was filed on Aug. 16, 2007 (11/839,898). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,345,049.PN.&OS=PN/8,345,049&RS=PN/8,345,049 Written by Kusum Sangma; edited by Anand Kumar.

*** General Electric Assigned Patent ALEXANDRIA, Va., Jan. 4 -- General Electric, Niskayuna, N.Y., has been assigned a patent (8,346,326) developed by James William Bray, Niskayuna, N.Y., Evangelos Trifon Laskaris, Schenectady, N.Y., and Kiruba Sivasubramaniam, Clifton Park, N.Y., for a "superconductive wire, processes of manufacture and uses thereof." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An electrical component comprises a superconductive wire, the wire comprising a first wire segment joined to a second wire segment, wherein the first wire segment and the second wire segment differ in at least one property selected from the group consisting of magnetic field tolerance, temperature tolerance, ac loss, and strain tolerance, and wherein the magnetic field tolerance is measured by the relationship of critical current Ic to magnetic field H at a given temperature T below critical temperature Tc, the temperature tolerance is measured by the relationship of critical current Ic to temperature T at a given magnetic field below critical magnetic field Hc, the ac loss is measured by the amount of ac loss versus the frequency and magnitude of applied ac currents and fields, and the strain tolerance is measured by critical current Ic degradation with strain." The patent application was filed on Jan. 17, 2008 (12/015,817). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,346,326.PN.&OS=PN/8,346,326&RS=PN/8,346,326 Written by Kusum Sangma; edited by Anand Kumar.

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